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NCP1910
490 10 6 V Rt
R min +
490 10 6 V Rt
R max +
? The minimum switching frequency is given by the R min
resistor value. This frequency is reached if there is no
feedback action and soft start period has already
elapsed.
(eq. 22)
F min
? The maximum switching frequency excursion is limited
by the R max selection. Note that the maximum
frequency is influenced by the opto ? coupler saturation
voltage value.
(eq. 23)
F max * F min
The definition of start ? up, shut ? off and these 2 delay
timers (t DEL1 and t DEL2 ) will be depicted later in “combo
management section”.
There are the other 2 delay timers are built ? in after the
brown ? out comparator:
? t BOK is the delay timer after V bulk is rising above the
BO level.
? t BONOTOK is the delay timer after V bulk is falling down
the BO level.
NCP1910 gets the information of V bulk from the PFC FB
pin, which minimizes the losses of the high voltage sensing
circuit. As depicted in Figure 22, 3 resistors (R 1 , R 2 , and R 3 )
among V REF , PG adj , BO adj pin, and ground determine the
levels of PG out signal and LLC brown ? out as the following
formulas:
R SS +
V PG + @ V REF
+ V bulk,PG @
? Resistor R SS together with capacitor C SS prepares the
soft start period for the resonant converter.
490 10 6 V Rt
(eq. 24)
F SS * F min
Where:
R 2 ) R 3
R 1 ) R 2 ) R 3
R FBL
R FBU ) R FBL
+ V bulk,PG @
(eq. 25)
V PREF
V bulk,nom
V BO + @ V REF
+ V bulk,BO @ + V bulk,BO @
V bulk,PG
R 2
? V Rt = 3.5 V
? F min is the minimal frequency
? F max is the maximal frequency
? F SS is the maximal soft start switching frequency
LLC Power Good Signal and Brown ? out (PG adj , PG out
and BO adj Pin)
As shown in Figure 22, the NCP1910 provides the
Brown ? Out circuitry (BO) that offer a way to protect the
resonant converter from operating at too low V bulk . In the
mean time, NCP1910 provides a Power Good signal (PG out )
to inform the isolated secondary side that the NCP1910 is in
order of match.
Once the PFC has started and raises V bulk above 95% of
its regulated voltage, an internal “PFC_OK” signal is
asserted. 20 ms later (t DEL1 ), the PG out pin is brought low.
The PG out signal can now disappear, which will release
PG out pin open, in two cases:
? V bulk decreases to the level, programmed by a reference
voltage imposed on PG adj pin. This level is usually
above the LLC turn ? off voltage, programmed by BO adj
pin. Therefore, in a normal turn ? off sequence, PG first
drops and informs the secondary side that it must be
prepared for shutdown.
? The second event that can drop the PG signal is when
the PFC experiences a fault: broken feedback path
(PFC UVP), PFC abnormal, or input line brown ? out. In
either case, the internal PFCok signal will drop and
then assert the PG out signal high, and starts a 5 ms timer
(t DEL2 ). Once this timer is elapsed, the LLC converter
can be safely halted.
R 3
R 1 ) R 2 ) R 3
(eq. 26)
R FBL V PREF
R FBU ) R FBL V bulk,nom
Where:
? V PG is the voltage on PG adj pin
? V BO is the voltage on BO adj pin
? V REF is the reference voltage (5 V typically).
? V PREF is the internal reference voltage for PFC
feedback OTA (2.5 V typically)
? V bulk,PG is the bulk voltage when PG out pin is
released open.
? V bulk,BO is the bulk voltage when brown ? out
function of LLC activates.
? V bulk,nom is the normal bulk voltage, e.g. 390 V.
Divide Equation 25 by 26, we can get the relationship
between R 2 and R 3 in Equation 27:
+ * 1 (eq. 27)
R 3 V bulk,BO
Hence, by given V bulk,PG and V bulk,BO , and choose the
value R 3 as the 1 st step, we can get the R 2 by Equation 27 and
R 1 by Equation 26.
For example, V bulk,nom is 390 V, V bulk,PG is 340 V, and
V bulk,BO is 330 V. Choose 10 k W resistor as R 3 . Then R2 is
303 W . Choose 300 W as it is the closet standard resistor.
Then we can get the R 1 is 13.3 k W .
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